1. Field of the Invention
The present invention relates to the field of optical lithography and, more particularly, to the exposure of photosensitive material to light in order to pattern devices on a semiconductor wafer.
2. Background of the Related Art
The use of optical lithography to pattern devices that are fabricated in a semiconductor wafer (such as a silicon wafer) is well known and has been in practice for many years. Generally, a mask is used in which light absorbing elements present in the mask define a positive or a negative pattern in a photosensitive media such as photoresist. One common practice is to position light absorbing chrome on a transparent mask material, such as glass (or quartz). The light not absorbed by the chrome is projected through the mask and projection optics and exposes a photosensitive material (such as a photoresist) to form a latent image therein. Depending on the positive or negative nature of the photoresist employed, one area (the exposed or the unexposed area) is developed and removed. The areas of photoresist that were removed exposes the underlying substrate areas which are then processed by various techniques, including etching and ion implantation, which in conjunction with deposition techniques form device features, such as gates, interconnects, etc. The photoresist remaining on the surface functions as a mask when the underlying layer is processed.
FIG. 1, for example, illustrates a typical conventional diffraction limited microlithography technique, in which a mask (reticle) 10 is used to project a latent image onto a photosensitive target 11. Generally, light from a light source 12 is directed toward the target 11 to expose some form of photosensitive medium. In integrated circuit fabrication, the light source 12 is typically a non-coherent point source, although coherent light (such as a laser) can be used. The target is usually a photoresistive material (photoresist) deposited atop a semiconductor wafer.
When light passes through the mask 10, a pattern present in the mask 10 is projected and a latent image formed in the target 11. An optical element (such as a lens) or system 13a is used to focus and often reduce the image of mask 10 onto the target 11. Conventional microlithography tools are known as diffraction limited tools, since the imaging performance of the projection system is limited by the number of diffracted orders collected by projection system's Numerical Aperture while forming the image of smallest pattern on Mask 10 it is employed to resolve. As shown in FIG. 1, when illumination light 15 reaches the mask 10, it is diffracted by the mask features 17. For the smallest resolvable feature pitch present on the mask only the diffracted +1 and -1 orders, as well as the zero order, will be allowed to propagate through the projection system to form the image of the mask on the wafer 11 as shown in FIG. 1. As an illustrated example shown in FIG. 1, all three orders will interfere at the wafer plane at the point 16 on the wafer 11 to form the image of the corresponding point of the mask 10. It is appreciated that the structure and operation of conventional lithography tools for patterning semiconductor wafers is known in the art.
A typical mask 10 is fabricated from a transparent material (such as glass or quartz), sometimes referred to as a mask substrate. The mask 10 has light absorbing elements (light absorbers) 17 disposed on it to absorb light. The pattern of the light absorbers on the transparent substrate provides the transparent and opaque and patterns that are projected to expose the photosensitive medium present. That is, the mask pattern is projected to form a latent image in a photoresist 18. Since the feature dimensions are dependent on the image resolution of the optical system 13a and the photoresist 18, the feature dimension on an integrated circuit device is thus dependent on the smallest discernible dimension (referred to as the critical dimension, or CD) of the pattern formed in the photoresist 18.
Uniformity of integrated circuit (IC) features' critical dimensions is necessary to achieve highest possible IC performance. One factor that affects critical dimension's uniformity on the wafer 11 is scattered light that reach wafer 11, in addition to light diffracted by features 17 of the mask 10 that propagated through the optical system 13a, as shown for 0, +1 and -1 diffracted orders directions. Scattering is a well known physical phenomena that degrades the image being formed at the target. Essentially, any light that does not propagate along the line defined by physical diffraction direction is regarded as scattered light. Scattering has also been referred to as optical noise or flare. Although scattering is undesirable, it is appreciated that some amount of scattering will always be present with the diffraction limited conventional microlithography technique shown in FIG. 1. There are many causes of scattering in the lithography tool, some due to the process and others due to the tool itself. Some sources of scattering are still not well understood.
However, what is known is that the CD for a photosensitive medium may vary across its area, when formed through a microlithography process. Whether this variation in the CD is due to light scattering alone or combined with other factors, the variations are undesirable. Since the size of the resist features (such as gate or trench openings of an integrated circuit device) will depend on the combined dose produced by diffracted and scattered light in the exposed photoresist, the extent of the exposure difference on the photoresist pattern across the field of the image plane can result in feature size variations for the integrated circuit. Such variations in the feature (component and wiring) differences are undesirable, since performance of the integrated circuit may be impacted. For example, sizeable difference in the width of wiring lines can result in signal current variations.
Accordingly, it is appreciated that a more uniform CD distribution and uniformity of photoresist exposure can provide for a more uniform feature fabrication on the integrated circuit, so that overall integrated circuit performance is improved, or at least not degraded as device dimensions surpass below 0.35 micron technology.